There are a few very common problems that come up during board layout and routing that can sometimes be easily avoided with some planning in the schematic capture step. This is because important design rules are defined early in the process that have a tremendous impact on the success (or failure) of the board route. All nets in the design are categorized and assigned a set of rules that guide the routing process. Any deviation from these set rules will be reported as design errors in the DRC (Design Rules Check) report. Here are some areas that should be carefully considered to maximize the cost, reliability, and functionality of the finished design:
- Trace Widths. The maximum possible current on every net should be determined and considered in order to avoid overheating and possible
fires. On the other hand, unnecessarily large width assignments can cause the design footprint to grow and expensive layers to be
added. Any time a trace cannot be routed between through hole component pins things start getting larger. Try to assign trace widths
that will carry the maximum net current with a reasonable margin of safety, but without excess copper.
- Copper Clearances. Again, the
higher the numbers the bigger the potential impact on routing. Assign minimum clearances based on board parameters (materials, thicknesses,
etc.) and voltages between nets.
- Impossible Situations. Large traces cannot reach component pins that are not on the outside rows.
A common example is a connector with more than 2 rows of pins that are spaced closely enough so as not to allow larger traces to route
between the outside pins. There are ways to connect these but they create current-sharing situations that pose risk of copper overheating.
Try to keep higher current nets on the outside pins of such devices.
- Power Distribution. Current limiting devices provide an easy
and effective way to keep power trace sizes down while decreasing the probably of overheating in the event of component failure or
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